1. Field of the Invention
The present invention relates to a compound semiconductor memory device, and more particularly, to a compound semiconductor memory device of static random access memory (hereinafter called as SRAM) type having a redundant memory cell section and a redundant decoder.
2. Description of Related Art
Heretofore, in a SRAM device of silicon series, a redundant memory cell section and a redundant decoder of a type in which selected fuses are blown by laser beam have been provided to replace defective memory cells to good ones in the redundant memory cell section thereby enhancing the yield ratio of the device. However, in a conventional compound semiconductor memory device such as of gallium arsenide (GaAs) series, a redundancy configuration is not provided because one suitable for the compound semiconductor memory device has not been developed. Therefore, when one or two defective memory cells are produced in the compound semiconductor memory device of, for example, 4K bits SRAM, the device must be rejected, and therefore, the yield ratio cannot be enhanced.